Title:
OVERLOAD DETECTING CIRCUIT FOR AMPLIFIER
Document Type and Number:
Japanese Patent JPS5815307
Kind Code:
A
Abstract:
PURPOSE: To surely detect overload, by avoiding the fluctuation of a collector potential of a detecting transistor (TR) by an output signal level.
CONSTITUTION: A resistor R4 is connected betweeb an emitter of a TRQ5 and an emitter of a power TRQ1 of the output stage of an amplifier and a resistor R5 is connected between the emitter of the TRQ5 and a power supply Vcc. The base of the TRQ5 is connected to an input terminal of a load RL via a diode D3 to compensate an emitter-to-base voltage of the TRQ5 and grounded via a resistor R6. The condition of detection of an overload is RE/(R4.RL)>1/R5.
Inventors:
NAKAYAMA KAZUAKI
Application Number:
JP11412881A
Publication Date:
January 28, 1983
Filing Date:
July 20, 1981
Export Citation:
Assignee:
PIONEER ELECTRONIC CORP
International Classes:
H03F1/52; H03F1/42; (IPC1-7): H03F1/52
Attorney, Agent or Firm:
Fujihiko Motohiko