Title:
ＰＷＭ出力回路及びそれを有する画像形成装置
Document Type and Number:
Japanese Patent JP7277266
Kind Code:
B2
Abstract:
This invention provide a PWM outputting circuit that, from pattern data represented by a plurality of bits representing a pulse width, generates a pulse width modulation signal, wherein the circuit comprises a multi-phase-clock generating circuit which generates a multi-phase clock which is a plurality of clocks of mutually different phases; an edge-pulse generating circuit which, from the pattern data that is inputted, detects a bit position of a rising-edge and a bit position of a falling-edge in the pulse width modulation signal, and generates a rising-edge-pulse and a falling-edge-pulse based on the detection; and an SR latch circuit which, by the rising-edge-pulse being inputted to a set terminal and the falling-edge-pulse being inputted to a reset terminal, generates and outputs the pulse width modulation signal.
Inventors:
Hiroyuki Mutoh
Application Number:
JP2019105610A
Publication Date:
May 18, 2023
Filing Date:
June 05, 2019
Export Citation:
Assignee:
Canon Inc
International Classes:
H03M5/08; B41J2/47; H04L25/49
Domestic Patent References:
| JP2001251370A |
Foreign References:
| WO2002100058A1 |
Attorney, Agent or Firm:
Patent Attorney Corporation Otsuka International Patent Office
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