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Patent Searching and Data


Title:
PACKAGE BLOT INSPECTING DEVICE AND PACKAGE BLOT INSPECTING METHOD
Document Type and Number:
Japanese Patent JP2000038256
Kind Code:
A
Abstract:

To improve the detection sensitivity of a surface blot by comparing the luminance value of each picture element of image information with the prescribed luminance value, using it as blot candidate data when it is smaller than the prescribed luminance value, calculating the area value of the blot candidate data with an area calculating means, and judges the position as a blot when the calculated area value is larger than the prescribed area value.

A binarization circuit 7 serving as a binarization processing means compares the image information read by an image reading means with the reference luminance value, separates the image information into a high-luminance portion and a low-luminance portion, and sets a high-luminance point to '0' and a low-luminance point to '1' for binarization. An area measurement circuit 8 serving as an area measuring means calculates the area of a group of picture elements set to '1' by the binarization circuit 7, a comparison circuit 9 serving as a judging means judges the group of picture elements as a 'blot' and outputs an alarm signal when the area of the blot candidate is larger than the reference area set in advance, and a package blot is automatically inspected. The detection sensitivity of a surface blot and the detection accuracy of the blot can be improved.


Inventors:
IMAI HIROYUKI
KASHIWAGI YASUO
SHIRASAKI MASATAKA
MORI EIJI
TONAI MASAHARU
Application Number:
JP22543598A
Publication Date:
February 08, 2000
Filing Date:
July 23, 1998
Export Citation:
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Assignee:
TORAY DU PONT KK
TORAY ENG CO LTD
International Classes:
D06H3/08; B65H63/00; (IPC1-7): B65H63/00; D06H3/08
Attorney, Agent or Firm:
Mikio Kagawa