PURPOSE: To convert multibit parallel data to serial data in a short time by dividing a serial signal output line, from which many parallel signals are converted to serial signals and are sent out, to plural blocks and performing processings.

CONSTITUTION: A parallel/serial converting circuit divides the serial signal output line to plural circuit blocks 5 and processes them. An output O of the circuit block 5 is so designed that data is outputted only when the block itself takes charge of data transfer and the output O has a high impedance in the other periods. This operation is possible by an RSFF consisting of NOR gates 6 and 7, an OR gate 8, and a clocked inverter 9 by using an output Q1 of the first bit and an output Qn of the n-th bit of a shift register in the block 5. An output A of the gate 8 goes to the high level when the output Q1 rises, and the output A is returned to the low level after the output Qn falls. The output of the block 5 is effective only when the output A is in the high level, and the output of the inverter 9 has a high impedance when the output A is in the low level.