PURPOSE: To detect even and odd errors in the same frame, by inserting parity information in the bits of a parity check word, transmitting them, and detecting in order a bit error of each information word, in the receiving side.

CONSTITUTION: In the transmission side, "0" or "1" is inserted into the P1 bit so that the number of "1" of the first bits A1, B1, C1, D1 of each word of the information A, B, C, D and the parity check P of the frame becomes an even number. Subsequently, in the same way, the parity information is inserted into the second bit and thereafter, and is transmitted. The receiving side counts the number of the first "1" of each word, and outputs an error detection signal E1 in case when it is an odd number. In the same way, E2∼E4 are output as to the second bit and thereafter of each word. In this way, for instance, in case when there has been an error in C1 and C2, an error detection signal E1 and E2 appear once each, and concentrated errors in the same frame such as two bits continue can be detected exactly.