Login| Sign Up| Help| Contact|

Patent Searching and Data


Title:
PATTERN INSPECTING METHOD
Document Type and Number:
Japanese Patent JPH0290371
Kind Code:
A
Abstract:

PURPOSE: To reduce the deciding reference at a pattern boundary part by producing plural sampling pictures and deciding these pictures.

CONSTITUTION: The pictures received from an image pickup device 1 are binarized by a binarization circuit 2 and inputted to a RAM 51 or 52 via a switch circuit 4. The data on the RAM 51 and 52 are inputted to a shift register group 7 via a switch circuit 6. In this case, both circuits 4 and 6 input the horizontal synchronizing signal Yc8 to an n-ary (n = 2) disk counter 9 and work with the obtained switch signal 10. While the write and read addresses 14 and 12 of both RAMs are produced from the scan clock Xc11. The sampled binary signals are successively inputted to the register group 7 and the output of the group 7 is inputted to a serial-in/parallel-out shift register 23 consisting of (M × N) picture elements. Then plural pictures are decided.


Inventors:
HAMADA TOSHIMITSU
NAKAHATA MITSUZO
NOMOTO MINEO
HASHIMOTO YUTAKA
Application Number:
JP24105588A
Publication Date:
March 29, 1990
Filing Date:
September 28, 1988
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
HITACHI LTD
International Classes:
G01N21/88; G01N21/93; G01N21/956; G06K9/03; G06T1/00; H01L21/027; H01L21/30; G01B11/24; H01L21/66; (IPC1-7): G01B11/24; G01N21/88; G06F15/62; G06K9/03; H01L21/027; H01L21/66
Attorney, Agent or Firm:
Katsuo Ogawa (1 person outside)



 
Next Patent: BRIDGE DETECTING CIRCUIT