Title:
PATTERNING METHOD OF DOPED LAYER
Document Type and Number:
Japanese Patent JPS5649529
Kind Code:
A
Abstract:
PURPOSE:To make it possible to form a fine pattern also against a thick metal layer by a method wherein in the case of a prescribed region of a substrate is selectively coated and a metal layer is doped wholly, the coated layer is removed with a metal layer thereupon, the metal layer is removed only on the substrate plane, a PSG layer is used as a coating layer. CONSTITUTION:An SiO2 layer 2 is coated on the semiconductor substrate 1, and a window is opened, a prescribed diffusion region 1' is formed within the substrate 1, the PSG layer 3 is generated on the whole phase by a CVD method while the SiO2 layer 2 is being remained. In the following, the mask of photo resist film 4 is provided on the layer 3 avoiding the region 1', the exposing portion of layer 3 is etching removed. At this time, the thickness of Al layer 5 to be formed at the later time is as thickness as approximately 1mum, the thickness of the layer 3 is made approximately 3mum, the overhang quantity of the remained layer 3 is made about 10mum. Thereafter, the Al layer 5 attached on the region 1' wholly is made isolate from the Al 5 coated on the layer 3, and the layer 3 is removed with the layer 5 thereupon and only the desired pattern Al layer 5 is remained.
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Inventors:
IWAZAWA SHIGEO
Application Number:
JP12503479A
Publication Date:
May 06, 1981
Filing Date:
September 28, 1979
Export Citation:
Assignee:
FUJITSU LTD
International Classes:
H01L21/306; (IPC1-7): H01L21/306
Domestic Patent References:
| JPS52136588A | 1977-11-15 | |||
| JPS5338277A | 1978-04-08 |