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Patent Searching and Data


Title:
PATTERNING METHOD
Document Type and Number:
Japanese Patent JP2005251835
Kind Code:
A
Abstract:

To enhance shape control of a T-type gate electrode against variation in resist film thickness or light exposure (electron beam irradiation amount) incident to exposure of a multilayer film in fine T-type gate process employing multilayer resist, and to prevent impairment in the high frequency characteristics of a high frequency device.

A fine resist aperture pattern is formed of single layer EB resist on a semiconductor substrate, a first metal thin film is formed on the entire surface, and second resist is applied to form an aperture pattern at the umbrella part of a T-type gate. Plating of a second metal film is performed at the aperture of the umbrella part using the first metal thin film as a plating electrode, resist is removed, the first metal thin film of an underlying layer is removed using the second metal at the umbrella part as a mask, and then the first resist is removed to form a T-type gate.


Inventors:
MATSUNO TOSHINOBU
Application Number:
JP2004057218A
Publication Date:
September 15, 2005
Filing Date:
March 02, 2004
Export Citation:
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Assignee:
MATSUSHITA ELECTRIC IND CO LTD
International Classes:
H01L29/872; H01L21/338; H01L29/47; H01L29/812; (IPC1-7): H01L29/47; H01L21/338; H01L29/812; H01L29/872
Domestic Patent References:
JPH0745634A1995-02-14
JPH06302617A1994-10-28
JPH10261659A1998-09-29
Attorney, Agent or Firm:
Fumio Iwahashi
Tomoyasu Sakaguchi
Hiroki Naito