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Patent Searching and Data


Title:
PCM FRAME SYNCHRONIZING SYSTEM
Document Type and Number:
Japanese Patent JPH02172337
Kind Code:
A
Abstract:

PURPOSE: To identify whether an optical fiber is normal or faulty by assigning an identification bit identifying a sender to an idle bit in a frame in addition to a synchronizing signal.

CONSTITUTION: A frame synchronizing signal insertion circuit 1 inserts a specified frame synchronizing signal to a transmission PCM signal 10 and uses an identification bit insertion means to insert a predetermined identification bit (for example, a bit string using '1' as its 1st bit). An identification bit detection circuit 6 detects the identification bit from an output signal of a frame synchronizing circuit 5 subject to synchronization lock to identify and discriminate whether or not an output signal is an adequate reception signal. Thus, if the optical fiber is broken, the transmission signal is reflected in the broken face to cause a reception signal, then misrecognizing the signal as a normal reception signal is prevented.


Inventors:
SHIMADA YOSHITAKA
Application Number:
JP32821088A
Publication Date:
July 03, 1990
Filing Date:
December 26, 1988
Export Citation:
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Assignee:
NEC CORP
International Classes:
H04J3/06; H04L7/08; (IPC1-7): H04J3/06; H04L7/08
Domestic Patent References:
JPS58147294A1983-09-02
Attorney, Agent or Firm:
Naotaka Ide