PERFORMANCE TEST METHOD FOR SEMICONDUCTOR DEVICE WITH REDUNDANT CIRCUIT AND SEMICONDUCTOR DEVICE WITH REDUNDANT CIRCUIT

Title:

PERFORMANCE TEST METHOD FOR SEMICONDUCTOR DEVICE WITH REDUNDANT CIRCUIT AND SEMICONDUCTOR DEVICE WITH REDUNDANT CIRCUIT

Document Type and Number:

Japanese Patent JPH05314791

Kind Code:

A

Abstract:

PURPOSE: To realize a performance test method for which twice performance tests are not required even when a detective part found by the performance test is substituted with a redundant circuit in the performance test method for a semiconductor device with the redundant circuit and a semiconductor device with the redundant circuit.

CONSTITUTION: This method is a performance test method by which a semiconductor device having a normal circuit 1 and a redundant circuit 2 is operated in trial, and constituted so that operation in the trial is performed for the redundant circuit 2, as well in the performance test method of the semiconductor device by which substitute process substituting a defective part with the redundant circuit 2 is performed after the performance test.

Inventors:

HARADA NORIO

Application Number:

JP11919192A

Publication Date:

November 26, 1993

Filing Date:

May 12, 1992

Export Citation:

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Assignee:

FUJITSU LTD

International Classes:

G11C29/56; G11C29/00; G11C29/04; H01L21/66; H01L21/82; H01L27/10; (IPC1-7): G11C29/00; G11C29/00; H01L21/66; H01L21/82; H01L27/10

Attorney, Agent or Firm:

Aoki Akira (3 outside)

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