Title:
PERIODIC FUNCTION GENERATING CIRCUIT
Document Type and Number:
Japanese Patent JP3226884
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To obtain a periodic function generating circuit which generates a periodic function completely free of frequency distortion, amplitude distortion, and a phase shift from a sampling clock by combining the read output of a function ROM and the output of a zero-cross flag control circuit together into an encoded sampling value series.
SOLUTION: This circuit is composed of an address counter 1 and a function ROM 2 stored with the amplitude value of a generated periodic function. The function ROM 2 is stored with an amplitude value for a quarter of one cycle of the periodic function in each address, and inputs the output signal a4 of a register 7 as an address signal calculated by the address counter 1 and outputs the amplitude value corresponding to each address. The read-out output signal a9 and the output signal a6 of the zero-cross flag control circuit as a code bit are put together to generate an encoded sampling value series of one cycle of the periodic function.
More Like This:
Inventors:
Hiroaki Itida
Application Number:
JP1696099A
Publication Date:
November 05, 2001
Filing Date:
January 26, 1999
Export Citation:
Assignee:
NC Microsystem Co., Ltd.
International Classes:
G06F7/548; G06F1/02; G06F1/035; H03K3/80; (IPC1-7): G06F7/548; G06F1/02
Domestic Patent References:
| JP3294916A | ||||
| JP4169916A | ||||
| JP4101537A |
Attorney, Agent or Firm:
Naoki Kyomoto (2 outside)