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Title:
PHASE ADJUSTING DEVICE
Document Type and Number:
Japanese Patent JPH07202683
Kind Code:
A
Abstract:

PURPOSE: To form a phase adjusting device preventing the lowering of the accuracy of the frequency division signal generated due to the dispersion of the timing initializing a frequency divider.

CONSTITUTION: This device is composed of frequency dividers 2 and 3 frequency- dividing a clock signal 1 to be frequency-divided, phase detection circuits 7 and 8 detecting the phases of frequency division signals 4 and 6 outputted from each of frequency dividers 2 and 3, and a NOR gate 18 which is capable of detecting the deviation of the phases of the frequency division signals 4 and 6 by the phase detection outputs 16 and 17. From the NOR gate 18, a reset input signal 19 is inputted in the frequency divider 3. Thus, only when an initialization is necessary, the frequency divider 3 can be initialized and the frequency division signal can be always obtained.


Inventors:
KOMAI AKITO
MASUKO YASUNAO
TANAHASHI TAKEO
Application Number:
JP33615793A
Publication Date:
August 04, 1995
Filing Date:
December 28, 1993
Export Citation:
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Assignee:
MATSUSHITA ELECTRIC IND CO LTD
International Classes:
H03L7/00; (IPC1-7): H03L7/00
Attorney, Agent or Firm:
Akira Kobiji (2 outside)



 
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