To detect accurately a phase difference with constant phase difference detection sensitivity by masking an output signal that is almost inversely proportional to a phase difference of input signals, among output signals of two phase comparison means.
Let a delay amount of delay circuits 41, 42 be D1, a delay amount of delay circuits 471, 472 be D2 (D2≤D1), and transmission times T1, T2 between an input and an output of flip-flop circuits 1-4 are negligibly smaller than the delay times D1, D2. Then a connection changeover switch 61 controlled by a μ-computer 62 is thrown to a position of a terminal 54 in the case of phase comparison. In this case, each pulse width of main phase difference pulses 103, 104 and sub phase difference pulses 105, 106 is expressed as T(103)= T(104)=ΔT+D1-ΔTFF and T(105)=T(106)=-ΔT+D1-ΔTFF. Through the configuration above, the sub phase difference pulses 105, 106 are masked by pulse 117 with a prescribed time width by an OR circuit. Thus, the pulse time width is reduced in proportion to an input phase difference.
NAKAJIMA JUNJI
HIROSE KOICHI
