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Title:
Phase Hysteresis Magnetic Josephson Junction Memory Cell
Document Type and Number:
Japanese Patent JP6357592
Kind Code:
B2
Abstract:
One embodiment describes a memory cell. The memory cell includes a phase hysteretic magnetic Josephson junction (PHMJJ) that is configured to store one of a first binary logic state corresponding to a binary logic-1 state and a second binary logic state corresponding to a binary logic-0 state in response to a write current that is provided to the memory cell and to generate a superconducting phase based on the stored digital state. The memory cell also includes a superconducting read-select device that is configured to implement a read operation in response to a read current that is provided to the memory cell. The memory cell further includes at least one Josephson junction configured to provide an output based on the superconducting phase of the PHMJJ during the read operation, the output corresponding to the stored digital state.

Inventors:
Har, Anna Wai.
Har, Quentin Pee.
MiCrick, Andrew Foster
Application Number:
JP2017545321A
Publication Date:
July 11, 2018
Filing Date:
March 04, 2016
Export Citation:
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Assignee:
NORTHROP GRUMMAN SYSTEMS CORPORATION
International Classes:
G11C11/44
Domestic Patent References:
JP2015525426A
JP2013529380A
Foreign References:
WO2013180946A1
US20120184445
Attorney, Agent or Firm:
Makoto Onda
Hironobu Onda
Atsushi Honda