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Title:
電流ミラー回路を有する電荷ポンプを用いた位相ロックループ回路
Document Type and Number:
Japanese Patent JP4917546
Kind Code:
B2
Abstract:
A system and method for performing phase-locked loop is disclosed. The system includes phase frequency detector circuitry, charge pump circuitry having first current mirror circuitry and second current mirror circuitry, loop filter circuitry, and voltage controlled oscillator circuitry. The phase frequency detector circuitry generates an up signal and a down signal based on the phase difference of an input signal and a feedback signal. The charge pump circuitry includes the first current mirror circuitry and the second mirror circuitry and generates a charge pump output signal based on the up and down signals. The loop filter circuitry generates a filtered control signal based on the charge pump output signal. The voltage controlled oscillator circuitry generates the feedback signal with a repeating waveform based on the filtered control signal.

Inventors:
Cap Run, Randy Jay
Hardy, Stephen Pea
Cole, Andrew
Application Number:
JP2007545736A
Publication Date:
April 18, 2012
Filing Date:
December 13, 2005
Export Citation:
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Assignee:
Mosside Technologies, Inc.
International Classes:
H03L7/093
Domestic Patent References:
JP2001068650A2001-03-16
JPH10322213A1998-12-04
JP2001053604A2001-02-23
JPH10190455A1998-07-21
Attorney, Agent or Firm:
Fukami patent office