PURPOSE: To reduce the pull-in time at start without losing the characteristic of a PLL modulator at the steady-state by connecting a diode in parallel with a lag filter resistor being a component of a lag/lead filter in the forward polarity.

CONSTITUTION: A resistor 107, a capacitor 108 constitute a lag filter B connected to an output of a PD 104 and its cut-off frequency is selected to be sufficiently lower than the comparing frequency of the PD 104. A resistor 109 of a lag/lead filter A is connected in parallel with a diode 115 and one terminal of a resistor 114. The resistor 109 is short-circuited by the diode 115 at the start to increase the cut-off frequency of a loop filter thereby stabilizing the loop at a high speed. Further, no current flows to the diode 115 at the steady state, the cut-off frequency of the loop is lowered and the noise characteristic of the loop is improved.