To generate shift clock shifted from the phase of a reference clock by the prescribed amount of phase by providing a first clock generation part for generating the first clock of a prescribed period and a second clock generation part for generating the shift clock at the prescribed timing of the first clock.

A phase shifter 10 is provided with a first clock generating part 66a and a second clock generating part 66b. The first clock generating part 66a has a first frequency divider 60a, a third frequency divider 60b, a first phase comparator 62a and a first voltage control oscillator 64a. The second clock generating part 66b has a second frequency divider 60c, a fourth frequency divider 60d, a second phase comparator 62b and a second voltage control oscillator 64b. The first clock generating part 66a generates the first clock of the prescribed period based on an input clock. The second clock generating part 66b generates a shift clock with a prescribed timing of the first clock.