PURPOSE: To ensure a faithful and stable extraction of the output signal of an image sensor, by setting the first bit transfer period longer than the second bit transfer period of the shifting transfer pulse and thus charging and sampling the signal charge completely.

CONSTITUTION: For the reset pulse R of the electric charge detecting amplifier 7, the conventional period is set double period. Thus the final output signal OS has an addition of e.g. the first and second bits, and the output signal of an image sensor becomes equivalent to 128 bits. For the shifting transfer pulses 1 and 2, the analog shift registers 4 and 5 can be shifted under the conditions of t3>t4, where t3 and t4 are the first and second bit transfer periods respectively. As a result, a perfect charging is possible for the signal charge. Then the sampling pulse is sampled at least only by an odd-numbered bit out of the sample holding circuit 10 to the signal. In such way, the output signal of an image sensor can be extracted in a faithful and stable way.