PIPELINE TYPE A/D CONVERTER, HOLD CIRCUIT

Title:

PIPELINE TYPE A/D CONVERTER, HOLD CIRCUIT

Document Type and Number:

Japanese Patent JP2010135905

Kind Code:

A

Abstract:

To provide a pipeline type A/D converter capable of operating with a high precision, without increase in power consumption.

The analog to digital converter is configured with a plurality of stages. The plurality of stages include: CAP 307a, 307b, 307c, 307d, SW 304c, 304d, 304a, 304k, 304l, and 304i for separately sampling analog differential input signals VPin and VNin; SW 304c, 304d, 304k, 304l for determining a sampling operation timing for a sampling circuit, multiple value output circuits 306, 309 for adjusting the value of the sampled signals VPin and VNin according to the value of a digital signal dj; an amplifier 305 for holding the adjusted signals VPin and VNin; SW 304b, 304j for transferring analog differential output signals VPout and VNout; and an SW 304q for short-circuiting and equalizing a terminal 310 and a terminal 311 prior to transfer.

Inventors:

NAKANISHI JUNYA

Application Number:

JP2008307522A

Publication Date:

June 17, 2010

Filing Date:

December 02, 2008

Export Citation:

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Assignee:

ASAHI KASEI DENSHI KK

International Classes:

H03M1/14

Domestic Patent References:

JP2010074636A	2010-04-02
JP2007201550A	2007-08-09
JP2005072844A	2005-03-17
JP2008205704A	2008-09-04
JP2009239703A	2009-10-15

Attorney, Agent or Firm:

Tetsuya Mori
Yoshiaki Naito
Hide Tanaka Tetsu

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