Title:
画素ユニット、アレイ基板、表示装置、およびその製造方法
Document Type and Number:
Japanese Patent JP6966331
Kind Code:
B2
Abstract:
Pixel unit, array substrate, and display device, and their fabrication methods are provided. The disclosed pixel unit can include: a transistor, including a drain electrode; a pixel electrode, including a first bottom conductive layer in contact with a surface of the drain electrode and a metal layer; and a planarization layer, formed on the transistor and the first bottom conductive layer. The metal layer is electrically connected to the first bottom conductive layer through a via-hole in the planarization layer.
Inventors:
Zucian One
Application Number:
JP2017557433A
Publication Date:
November 17, 2021
Filing Date:
April 25, 2017
Export Citation:
Assignee:
BOE TECHNOLOGY GROUP CO.,LTD.
International Classes:
G09F9/30; G02F1/1368; H01L21/77; H01L27/32; H01L51/50; H05B33/06; H05B33/26
Domestic Patent References:
| JP2002040479A | ||||
| JP2007212699A | ||||
| JP2012036505A | ||||
| JP2008275940A | ||||
| JP2007133371A |
Foreign References:
| US20070194677 |
Attorney, Agent or Firm:
Yasuhiko Murayama
Shinya Mitsuhiro
Shinya Mitsuhiro
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