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Title:
PLATED COATING, METHOD FOR FORMING THE SAME, AND ELECTRONIC COMPONENT
Document Type and Number:
Japanese Patent JP2007177311
Kind Code:
A
Abstract:

To provide a method by which the generation and growth of whiskers in a plated coating including a tin-plated layer comprising tin (Sn) or a tin alloy can be suppressed to the utmost.

The method comprises: forming a Sn-plated layer 2 comprising Sn or a Sn-alloy; then forming an intermediate layer 3 made of a metal having a melting point higher than Sn on the surface of the Sn-plated layer 2; and forming a Sn-plated layer 4 arranged in the outermost surface of the plated coating, comprising Sn or a Sn-alloy and having a film thickness thinner than that of the Sn-plated layer 2 on the intermediate layer 3. Because the Sn-plated layer 4 arranged in the outermost surface of the plated coating is plated into a thin film, the generation of whiskers is suppressed, and the growth of whiskers is also suppressed because the intermediate layer 3 inhibits the supply of Sn atoms to the Sn-plated layer 4 from the Sn-plated layer 2.


Inventors:
TAKEUCHI FUMIYO
SAKUYAMA SEIKI
Application Number:
JP2005379250A
Publication Date:
July 12, 2007
Filing Date:
December 28, 2005
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
C25D5/10; C25D5/16; C25D7/00
Domestic Patent References:
JPS5057036A1975-05-19
JP2004238689A2004-08-26
JPS63125694A1988-05-28
JP2003328157A2003-11-19
Attorney, Agent or Firm:
Takeshi Hattori