Title:
PLL CIRCUIT
Document Type and Number:
Japanese Patent JP3177025
Kind Code:
B2
Abstract:
PURPOSE: To compensate dispersion at the time of manufacture and to fix a loop band by adjusting the gain of a voltage controlled oscillator(VCO).
CONSTITUTION: A V/I converter 2A converts a signal voltage from a switch 4 by using an operational amplifier 6 and outputs it through transistors(TR) 7 and 8. A gain adjuster 2C inputs the output current from the converter 2A to the gates of respective TRs 9-12 in common and according to a signal from a correction circuit 5, respective switches 13-16 are closed. Every time the number of closed switches is increased, the value of the current for flowing from the converter 2A to an ICO 2B is increased. When the number of closed switches is one, for example, the gain of the VCO 2 is minimum and every time the number of closed switches is increased, the gain of the VCO is increased. The ICO 2B is provided with two capacitors 17 and 18, the time for charging the capacitors changes corresponding to the current value from the gain adjuster 2C, and the frequency of an output signal from the VCO is changed.
Inventors:
Masaki Ikeda
Application Number:
JP30222692A
Publication Date:
June 18, 2001
Filing Date:
November 12, 1992
Export Citation:
Assignee:
Asahi Kasei Microsystem Co., Ltd.
International Classes:
H03L7/093; H03L7/099; (IPC1-7): H03L7/099
Domestic Patent References:
| JP62296623A | ||||
| JP1136419A | ||||
| JP60142624A | ||||
| JP677736A | ||||
| JP62204615A |
Attorney, Agent or Firm:
Yoshikazu Tani (1 person outside)