POLYMER REMOVAL PROCESS IN SEMICONDUCTOR VIA

Japanese Patent JPH06295899

A

PURPOSE: To form contact vias in an integrated circuit, without damaging underlying conductive layers by removing contaminant particles contg. a polymer, formed when an insulation film is etched to form vias, using a chemical substance acting as a resist developer. CONSTITUTION: The process of forming vias 26 comprises forming an insulation layer 24 on conductive elements 20, forming a resist layer on the insulation layer 24, forming a pattern to define via positions, and anisotropically etching the layer 24 to bore the vias 26 at the via positions wherein contaminant particles contg. a polymer 28 are formed on the side walls of the vias 26 and removed by a chemical substance acting on the resist layer as a resist developer. A resist developer contg. tetramethyl ammonium hydroxide is e.g. used to remove the polymer 28 in the vias 26 and a conductive layer 30 is formed to extend in the vias 26 to form conductive contacts.

JP2005005700	PREPROCESSING METHOD FOR PROTECTING REAR SIDE OF WAFER AND REAR SIDE PROTECTED WAFER
JP2000208741	INTEGRATED CIRCUIT
JP2010135682	METHOD AND APPARATUS FOR MANUFACTURING PASTED SILICON WAFER

ROI NIYOKU NIYUUEN
IISHIYAN RIN

JP29407692A

October 21, 1994

November 02, 1992

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SGS THOMSON MICROELECTRONICS

H01L21/02; H01L21/302; H01L21/308; H01L21/3105; H01L21/311; H01L21/3213; H01L21/28; H01L21/768; H01L23/522; (IPC1-7): H01L21/308; H01L21/28; H01L21/302; H01L21/3205; H01L21/90

Kazuo Kobashi (1 person outside)

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