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Title:
POWER ANALYZER APPARATUS
Document Type and Number:
Japanese Patent JPH055762
Kind Code:
A
Abstract:

PURPOSE: To make the sampling synchronous signal of each A/D converter agree with an input signal to be measured at the optimum level according to the PLL synchronizing method and to automatically select the input signal at the optimum level when the input signals of a plurality of channels are to be A/D converted and the converted digital data is to be stored in a memory.

CONSTITUTION: This power analyzer apparatus is provided with a first switching part 31 which automatically selects one of a plurality of analog input signals to be measured, and a filter waveform part 32 which shapes the selected analog signal to a rectangular wave signal. Moreover, this apparatus is provided with a PLL part 34 which synchronizes the sampling signal of each A/D converter with this rectangular wave signal, and a CPU which determines whether the input signal to be measured is optimum as the source for the PLL part 34, controls switching of the first switching part 31, and automatically selects the optimum input signal to be measured for the source of the PLL part 34.


Inventors:
YANAGISAWA MASAYOSHI
Application Number:
JP14122291A
Publication Date:
January 14, 1993
Filing Date:
May 17, 1991
Export Citation:
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Assignee:
HIOKI ELECTRIC WORKS
International Classes:
G01R13/20; G01R13/28; G01R13/32; G01R23/16; G01R23/20; H03L7/00; (IPC1-7): G01R13/20; G01R13/32; G01R23/16; G01R23/20; H03L7/00
Attorney, Agent or Firm:
Takuya Ohara