Title:
電源回路及び電子機器
Document Type and Number:
Japanese Patent JP3994942
Kind Code:
B2
Abstract:
An efficient power factor correcting (PFC) circuit is constituted such that one terminal of an input rectifier (12) from which a pulsating voltage is obtained, is connected to a connection mid point of one terminal of a primary winding (15a) and the other terminal of an auxiliary winding (15c) wound in phase on a converter transformer (15), by means of a series circuit of a choke coil (13) and a first diode (14); one terminal of the auxiliary winding (15c) of the converter transformer (15) is connected to the other terminal of the input rectifier (12) through a first capacitor (16) and at the same time the other terminal of the primary winding (15a) is connected to the other terminal of the input rectifier (12) through a switching device (17); a secondary winding (15b) wound in counter phase with the primary winding (15a) for the converter transformer (15) is connected to a DC voltage output terminal (19a,19b) through a rectifying circuit (18); the DC voltage output terminal (19a) is connected to an input side of a pulse width modulation control circuit (20); and an output terminal of the pulse width modulation circuit (20) is connected to a control electrode of the switching device (17).
Inventors:
Noritoshi Imamura
Application Number:
JP2003279352A
Publication Date:
October 24, 2007
Filing Date:
July 24, 2003
Export Citation:
Assignee:
ソニー株式会社
International Classes:
H02M3/28; G05F1/70; H02M1/42; H02M3/155
Domestic Patent References:
| JP2002247843A | ||||
| JP2002199732A |
Attorney, Agent or Firm:
Yoshitsuno Kakuda
Hitoshi Ito
Hitoshi Ito