PURPOSE: To eliminate the influence of the rise time of each circuit power source upon the rise time of each circuit operation when a digital device operates again, by inhibiting the supply of an input signal and a basic clock to a digital logical circuit when the device need not operate.

CONSTITUTION: Digital input signal inhibiting circuits 7-1∼7-l are provided to input terminals for l digital signals and clock inhibiting circuits 8-1∼8-m are provided to (m) units of clock generating circuits 2-1∼2-m in series. When the digital device is in operation, the input inhibiting circuits 7-1∼7-l and clock inhibiting circuits 8-1∼8-m are on and the digital logical circuit 1 controls and processes the input signals to output digital output signals 1∼n. Then, when the digital device turns off, all input inhibiting circuits 7-1∼7-l and clock inhibiting circuits 8-1∼8-m are turned off by the output of a driving circuit 5 to inhibit the supply of the digital input signals 1∼l and clocks from the clock generating circuits 2-1∼2-m to the digital logical circuit 1. Then, the digital logical circuit 1 enters a stationary state.