To provide a power semiconductor device which responds to a request for achieving great current and high reliability even in the case where a distance between gate wires increases.

A power semiconductor device comprises: an n⁺ buffer layer 56, an n^- layer 57 and a p base region 66 provided on a top face of a p⁺ collector layer 55 in this order; two trench gates 3, 4 respectively including trenches 3a, 4a provided adjacent to each other and parallel with each other from a surface of the p base region 66 such that the bottoms of the trenches 3a, 4a reach the inside of an n^- layer 57, gate insulation films 3b, 4b respectively provided on inner faces of the trenches 3a, 4a, and gate electrodes 3c, 4c respectively provided so as to fill the inside of the gate insulation films 3b, 4b; n⁺ emitter regions 6 provided within a surface of the p base region 66 and each being adjacent to only one side of each of the respective trench gates 3, 4; an emitter electrode 51 provided on the p base region 66 and electrically connected with the n⁺ emitter region 6; and a collector electrode 63 provided on an undersurface of the p⁺ collector layer 55.