To prevent the effect caused by the defects of the edge area of a substrate and an effect due to arrangement structure of the substrate in a casing of a power semiconductor module, on the dielectric strength and partial discharge characteristic of the base dielectric portion.

At least one power semiconductor element(24) is located on a first metal layer(12), and the first metal layer(12) is positioned on a main surface(10a)of the substrate(10), and a second metal layer(14) is placed on a second main surface(10b) of the substrate(10). Another conductive layer(16) is located on the first main surface(10a) of the substrate(10) so as to surround the edge of the substrate(10), and the conductive layer(16) is electrically connected with the metal layer(14) of the second main surface(10b) of the substrate(10).