PURPOSE: To reduce the power consumption by providing a logic circuit which turns off one of a P channel MOS transitor(TR) and an N channel MOS TR at all times.

CONSTITUTION: An output voltage A is supplied to a comparator 1 from between resistors R1 and R2 in a group of resistors R. At this time, when the output voltage B of an output part 3 is higher than the output voltage, the output of the comparator 1 is in a low state and an output voltage D is at low level, so the P channel MOS TR 7a of the output part 3 turns on. Further, an output voltage E is also at low level, so the N channel MOS TR 7b turns off. Therefore, the output voltage B rises by VEE connected to one end of the P channel MOS TR. Then when the output voltage B rises above the output voltage A, the output voltage D passed through an inverter 6a goes up to high level and the P channel TR 7a of the output part 3 turns off.