PREDRIVER CIRCUIT, CAPACITIVE LOAD DRIVE CIRCUIT, AND PLASMA DISPLAY

Title:

PREDRIVER CIRCUIT, CAPACITIVE LOAD DRIVE CIRCUIT, AND PLASMA DISPLAY

Document Type and Number:

Japanese Patent JP2004274719

Kind Code:

A

Abstract:

To provide a predriver circuit which reduces a time lag between a high-level output voltage and a low-level output voltage.

The circuit comprises input amplifier circuits 41 and 44 for amplifying input voltages IN1 and IN2 having been inputted to input voltage terminals 33 and 34, high-level shift circuits 42 and 45 for shifting signal levels outputted by the input amplifier circuits, and a plurality of driving systems having output amplifier circuits 43 and 46 for amplifying shift signals outputted by the high-level shift circuits. The driving systems are identical to one another in configuration.

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Inventors:

ONOZAWA MAKOTO
OKADA YOSHINORI
OKI HIDEAKI
TAIRA MASATOSHI
KOIZUMI HARUO

Application Number:

JP2003427980A

Publication Date:

September 30, 2004

Filing Date:

December 24, 2003

Export Citation:

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Assignee:

FUJITSU HITACHI PLASMA DISPLAY

International Classes:

H03K17/16; G09G3/20; G09G3/288; G09G3/291; G09G3/296; G09G3/298; H03K17/687; (IPC1-7): H03K17/16; H03K17/687

Attorney, Agent or Firm:

Takashi Ishida
Jun Tsuruta
Shigeru Tsuchiya
Masaya Nishiyama
Higuchi Souji

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