PURPOSE: To prepare a test pattern efficiently by altering the conditions at the time of generation of a pattern automatically while watching the situation of the generation.

CONSTITUTION: After a group 2 of conditions on the specification of a sphere of assuming an object fault of a logic circuit 1, the setting of a fixed value of a pin, etc. are inputted in a stack in a condition discriminating process 3, an arbitrary condition out of them is set in a condition setting process 4 and a test pattern input 8 is generated according to this condition in a pattern generating process 5. For this input 8, fault simulation is conducted in a fault simulation process 6. As the result, a judgement as to whether switching should be made over to pattern generation according to another condition of the condition group 2 or not is made in a condition shift judging process 7, with a rate of detection used as a criterion of judgement, for instance. When the condition is switched over, a return is made to the condition setting process 4 and the pattern generation is continued. By repeating the above operations until satisfaction is found, a test pattern 9 is prepared.