Title:
【発明の名称】ICメモリカード
Document Type and Number:
Japanese Patent JP3146487
Kind Code:
B2
Abstract:
PURPOSE:To increase capacity by branching the conductor lead bonded to the non- common electrode of the memory LSI chip laminated to a printed wiring board corresponding to a lamination rank and connecting the other end part thereof along with the other end part of the conductor lead bonded to a common electrode by an insulating film and superposing the respective conductor leads one upon another to bond the same to the conductor wiring of the printed wiring board. CONSTITUTION:Since conductor leads 12, 12' are connected to the common electrodes 10, 10' of memory LSI chips 6, 6', they are connected to the same conductor wiring 20 of a printed wiring board 2. The conductor lead 17 branched from a conductor lead 15 is connected to conductor wiring 22 and a conductor lead 16 is partially cut and the conductor lead 16' branched from a conductor lead 15' is connected to conductor wiring 21 and a conductor lead 17' is partially cut. The other end parts 12b, 12'b of the conductor leads are superposed one upon another to be soldered to the conductor wiring 20. The other end parts 16b, 16'b of the conductor leads are superposed one upon another to be soldered to the conductor wiring 21 and the other end parts 17, 17' of the conductor leads are also superposed one upon another to be soldered to the conductor wiring 22.
Inventors:
Kikuo Kuma
Koji Sakuta
Hiroshi Yamazaki
Koji Sakuta
Hiroshi Yamazaki
Application Number:
JP26097090A
Publication Date:
March 19, 2001
Filing Date:
September 28, 1990
Export Citation:
Assignee:
Matsushita Electric Industrial Co., Ltd
International Classes:
B42D15/10; G06K19/077; G11C5/00; H01L25/065; H01L25/10; H01L25/11; H01L25/18; (IPC1-7): H01L25/065
Domestic Patent References:
| JP2217296A |
Attorney, Agent or Firm:
Fumio Iwahashi (2 others)