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Title:
PROCESSING OF RECEIVED SIGNAL AT DETECTION CIRCUIT
Document Type and Number:
Japanese Patent JP2004242327
Kind Code:
A
Abstract:

To reduce or eliminate disadvantages and problems associated with previous techniques for processing a received signal by which relatively slow and inefficient digital signal processing is performed.

Processing of a received signal includes receiving a signal with an analog form. The signal is sampled to yield sampled signal with an analog form. The following are repeated for each sampled signal. A feedback signal is generated from the sampled signal, and is converted from a digital form into an analog form. Correlation related to the sampled signal is discriminated according to the feedback signal generated from the sampled signal. The sampled signal with the analog form is adjusted according to the correlation related to the sampled signal in order to process the received signal.


Inventors:
HIDAKA YASUO
Application Number:
JP2004029865A
Publication Date:
August 26, 2004
Filing Date:
February 05, 2004
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
H03H15/00; H03H21/00; H03K5/159; H04B3/06; H04L25/03; (IPC1-7): H04B3/06; H03H15/00; H03H21/00
Domestic Patent References:
JP2001044895A2001-02-16
JP2000049664A2000-02-18
JPS59107624A1984-06-21
JPS59139717A1984-08-10
JPS6156504A1986-03-22
JPH0697729B21994-11-30
JPH03504788A1991-10-17
JPH04137907A1992-05-12
JP2000224080A2000-08-11
JP2000049661A2000-02-18
JPS63253713A1988-10-20
JP2001177590A2001-06-29
Attorney, Agent or Firm:
Tadahiko Ito