Title:
PRODUCTION OF ARRAY SUBSTRATE
Document Type and Number:
Japanese Patent JP3202342
Kind Code:
B2
Abstract:
PURPOSE: To prevent the warpage of an insulating substrate by the effect of heat and to produce the array substrate with high accuracy by forming the substrate in such a manner that the first wirings of one array element extend in the direction intersecting with the first wirings of another array element.
CONSTITUTION: The address wirings are so formed that the address wirings 21 of the array elements A, C, D, F extend in the direction orthogonal with the address wirings 21 of the array elements B, E at the time of patterning and forming 6 pieces of the array elements on the insulating substrate 10. The stresses generated in the insulating substrate 10 disperse in a direction X and a direction Y and the warpage of the insulating substrate is prevented even if the address wirings are shrunk by the heat treatment after the formation of the address wirings. Then, the array substrate for the liquid crystal display device is produced with high accuracy without degrading the positioning accuracy in a photolithography stage and generating troubles in a transporting stage.
Inventors:
Akira Hirahara
Masayuki Dojo
Masayuki Dojo
Application Number:
JP23247092A
Publication Date:
August 27, 2001
Filing Date:
August 31, 1992
Export Citation:
Assignee:
Toshiba Corporation
International Classes:
G02F1/13; G02F1/1343; G02F1/136; G02F1/1368; H01L21/336; H01L29/78; H01L29/786; (IPC1-7): G02F1/1368; G02F1/13; G02F1/1343
Domestic Patent References:
| JP3107127A | ||||
| JP4318818A |
Attorney, Agent or Firm:
Takehiko Suzue