Title:
PROGRAM WRITING CIRCUIT TO DUAL-PORT RAM
Document Type and Number:
Japanese Patent JP2006301776
Kind Code:
A
Abstract:
To provide a program writing circuit to a dual-port RAM, in which the number of components is reduced with a simplified bus switching circuit, and the address space of a CPU is not occupied by a bit arithmetic processor RAM area.
Output of a program counter 2 of a bit arithmetic processor is inputted to the address of a dual port RAM 1. When the CPU accesses the dual port RAM 1, the address of the dual port RAM seen from the bit arithmetic processor is written to the program counter 2.
Inventors:
HARA KENJI
Application Number:
JP2005119669A
Publication Date:
November 02, 2006
Filing Date:
April 18, 2005
Export Citation:
Assignee:
YASKAWA ELECTRIC CORP
International Classes:
G06F9/445; G05B19/05; G06F12/02; G06F12/06