Title:
プログラマブル線形受信機
Document Type and Number:
Japanese Patent JP4138243
Kind Code:
B2
Abstract:
A programmable linear receiver which provides the requisite level of system performance at reduced power consumption. The receiver minimizes power consumption based on measurement of the non-linearity in the output signal from the receiver. The amount of non-linearity can be measured by the RSSI slope or energy-per-chip-to-noise-ratio (Ec/Io) measurement. The RSSI slope is the ratio of the change in the output signal plus intermodulation to the change in the input signal. The input signal level is periodically increased by a predetermined level and the output signal from the receiver is measured. The output signal comprises the desired signal and intermodulation products from non-linearity within the receiver. When the receiver is operating linearly, the output signal level increases dB per dB with the input signal level. However, as the receiver transitions into non-linear region, intermodulation products due to non-linearity increase faster than the desired signal. By detecting the RSSI slope, the amount of degradation due to non-linearity can be determined. This information is then used to adjust the IIP3 operating point of the amplifiers and mixer to provide the requisite level of performance while minimizing power consumption.
Inventors:
Chikkareri, Stephen Sea
Eunice, Saed Gee
Kauffman, Ralph Yee
Eunice, Saed Gee
Kauffman, Ralph Yee
Application Number:
JP2000524867A
Publication Date:
August 27, 2008
Filing Date:
December 08, 1998
Export Citation:
Assignee:
QUALCOMM INCORPORATED
International Classes:
H04B1/16; H03F1/02; H03F1/34; H03G1/00; H03G3/18; H03G3/20; H04B1/10
Domestic Patent References:
| JP5167465A | ||||
| JP6023334U | ||||
| JP6224647A |
Attorney, Agent or Firm:
Takehiko Suzue
Sadao Muramatsu
Ryo Hashimoto
Toshio Shirane
Sadao Muramatsu
Ryo Hashimoto
Toshio Shirane