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Title:
PROGRAMMABLE LOGIC SWITCH
Document Type and Number:
Japanese Patent JP2013165466
Kind Code:
A
Abstract:

To provide a programmable logic switch that prevents a malfunction in a small chip area.

According to an embodiment, the programmable logic switch includes: a first nonvolatile memory having a first terminal connected to first wiring to receive a first control signal, a second terminal connected to second wiring to input a first signal, and a third terminal connected to third wiring to output a signal; a second nonvolatile memory having a fourth terminal connected to the first wiring to receive the first control signal, a fifth terminal connected to fourth wiring to input a second signal, and a sixth terminal connected to the third wiring to output a signal; and at least one transistor connected to the third wiring. Every transistor connected to the third wiring is connected to the third wiring at a gate electrode.


Inventors:
ZAITSU KOICHIRO
TATSUMURA KOSUKE
MATSUMOTO MARI
YASUDA SHINICHI
ODA MASATO
KUSAI HARUKA
SAKUMA KIWAMU
Application Number:
JP2012028947A
Publication Date:
August 22, 2013
Filing Date:
February 13, 2012
Export Citation:
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Assignee:
TOSHIBA CORP
International Classes:
H03K19/173; G11C16/02; G11C16/04; H01L21/336; H01L21/82; H01L21/8242; H01L21/8247; H01L27/108; H01L27/115; H01L29/788; H01L29/792
Domestic Patent References:
JP2006236560A2006-09-07
JP2000138351A2000-05-16
JP2003198361A2003-07-11
JPH11345496A1999-12-14
JP2005303990A2005-10-27
JP2006236560A2006-09-07
JP2000138351A2000-05-16
Attorney, Agent or Firm:
Fujiwara Yasutaka



 
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