Title:
PROTECTION SHEET FOR SEMICONDUCTOR PROCESSING AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JP2023071427
Kind Code:
A
Abstract:
To provide a protection sheet for semiconductor processing capable of suppressing exuding of a component from a sheet during storage while suppressing warpage of a semiconductor wafer when applied on the semiconductor wafer in which residual stress is generated and a method for manufacturing a semiconductor device using the same.SOLUTION: A protection sheet 1 for semiconductor processing has a base material 10, an intermediate layer 20 and an adhesive layer 30 on the base material 10 in this order. When a shear storage modulus of the intermediate layer 20 at 60°C is G' (60°C) and a shear storage modulus of the intermediate layer 20 at 80°C is G' (80°C), G' (60°C) and G' (80°C) satisfy the following formula. Residual stress RS2 of the intermediate layer 20 after holding at 65°C for 300 seconds is 10000 Pa or less.SELECTED DRAWING: Figure 5
Inventors:
NAKANISHI YUTO
HASHIMOTO SAE
HASHIMOTO SAE
Application Number:
JP2021184203A
Publication Date:
May 23, 2023
Filing Date:
November 11, 2021
Export Citation:
Assignee:
LINTEC CORP
International Classes:
H01L21/304; B32B27/00; C09J7/29; C09J7/38; C09J201/00
Attorney, Agent or Firm:
Maeda Suzuki International Patent Attorneys Corporation
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