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Title:
PULSE AMPLIFIER CIRCUIT
Document Type and Number:
Japanese Patent JPS60134517
Kind Code:
A
Abstract:

PURPOSE: To attain stable pulse amplification with low power consumption and fast pulse response by flowing a current from a power supply to an output terminal and from an output terminal to a common point depending on low/high level of an input pulse and flowing a peak current from the power supply to the output terminal at the moment when the level goes to a low level.

CONSTITUTION: The input pulse Vi is inverted via transistors (TR) 20, 21, an inverted pulse Ve22 is obtained at the emitter of an emitter follower comprising a TR22, this pulse is fed to a TR24 and a current I35 flows thereto. On the other hand, the pulse Ve22 is fed to differentiation circuits 33, 38, 39, a differentiation pulse Vb23 is obtained, a TR23 is turned on, a collector current IC23 flows, a current 24 shown in Figs. (d), (e) flows via a TR24, the current is amplified by TRs 25, 26 and fed to an output terminal. Then the pulse Vi is fed to TRs 28, 29 via an emitter input circuit comprising a TR37 so as to flow a current from the output terminal to the common point at the period when the pulse Vi is at a high level.


Inventors:
MASUDA MITSUYA
INOHARA SHIZUO
UEDA MINORU
YAMASHITA AKIRA
Application Number:
JP24246183A
Publication Date:
July 17, 1985
Filing Date:
December 21, 1983
Export Citation:
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Assignee:
MATSUSHITA ELECTRIC IND CO LTD
International Classes:
H03F3/00; H03K5/02; H03K17/60; H03K17/66; (IPC1-7): H03F3/00; H03K17/60
Domestic Patent References:
JPS57124930A1982-08-04
Attorney, Agent or Firm:
Akira Kobiji (2 outside)



 
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