PURPOSE: To make the operation of an LSI stable and to improve the reliability of a data processing unit by using a pulse signal such as a reset signal and a write/read control signal as a trigger signal to apply secondary processing to the pulse signal and ensuring a prescribed pulse width of the pulse signal subject to secondary processing.

CONSTITUTION: A 1st noninverting intermediate signal D1 is outputted to a 1st signal output means 13A by a 1st signal generating means 11A based on, e.g. a pulse signal PS and a reference clock CLK. Moreover, a 1st inverting intermediate signal -D1 is outputted to a 1st signal processing means 13A. Thus, when a pulse signal PS such as a control pulse and an instruction pulse is sent from a transmission point to a reception point, the pulse PS is used as a trigger signal to start the operation of the signal generating means 11A. Then the pulse signal PB1 synchronously with the leading or trailing of the CLK and having a prescribed pulse width Φi surely is outputted. Thus, the operation of an LS 1 of an input circuit or the like to be transited to other signal processing based on the pulse signal is made stable.