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Title:
PULSE DRIVER CIRCUIT
Document Type and Number:
Japanese Patent JPS5549038
Kind Code:
A
Abstract:

PURPOSE: To maintain the phase and period of an output in a normal state even while a synchronizing signal is cut off, by measuring a difference in rise time between an output pulse from a free-running oscillator and then by controlling a ratio of division of a free-running oscillation output by the output.

CONSTITUTION: A pulse from free-running oscillator 2 drives counter circuit 14 and is divided by 1/N-divider circuit 15, whose output is made into a pulse of duty 50% by FF16 and then outputed from terminal 4. By exclusive-OR circuit 5, OR circuit 6, monostable circuit 7, and AND circuit 8, a period when an external synchronizing signal differs in rise part from an output signal from oscillator 2 is separated and this length is subtrated by up-down counter 9 when the rise of the output signal lags or added when leading, by using as a unit pulse obtained by dividing 10 the output of oscillator 2 by a number 2 or greater. As a result, when the output signal lags, circuit 15 performs division by a number smaller than usual and when leading, division is done reversely, thereby making a shift in a direction where it agrees with the external synchronizing signal.


Inventors:
ITOU HIROYUKI
Application Number:
JP12224178A
Publication Date:
April 08, 1980
Filing Date:
October 03, 1978
Export Citation:
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Assignee:
NIPPON ELECTRIC CO
International Classes:
H03K23/00; H03K23/66; (IPC1-7): H03K21/36



 
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