Title:
PULSE MODULATION SYSTEM
Document Type and Number:
Japanese Patent JP3153084
Kind Code:
B2
Abstract:
PURPOSE: To facilitate demodulation and shorten a frame transmission period TF by imposing pulse phase modulation in units of 2-bit data.
CONSTITUTION: When the 2-bit data is (0, 0) in normal mode, a pulse signal with pulse width (t) is generated and a pulse stop interval Tr is set to the pulse width (t). When the data is (0, 1), a pulse signal with pulse width (t) is generated to set the interval Tr to 2t, and when the data is (1, 0), a signal with pulse width (t) is generated to set the interval Tr to 3t. When the data is (1, 1), the rear interval Tr of a pulse signal with pulse width (t) is set to 4t. Further, the 2-bit data (0, 0) of a flag is set similarly to an interval equal to the pulse width (t) after a pulse signal with the pulse width (t) is generated, and is modulated into a flag signal. Before that, a header, a flag signal, and then an end signal are applied to obtain a 2-bit PPM modulated signal. Consequently, the demodulation is facilitated and the frame transmission period TF is shortened.
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Inventors:
Kenichi Miwa
Application Number:
JP30417794A
Publication Date:
April 03, 2001
Filing Date:
November 15, 1994
Export Citation:
Assignee:
SMK Co., Ltd.
International Classes:
H03M5/14; H04B10/114; H04B10/40; H04B10/50; H04B10/524; H04B10/556; H04B10/60; H04L25/49; H04L25/493; H04N5/00; (IPC1-7): H04L25/49; H03M5/14; H04B10/04
Domestic Patent References:
| JP5516575A | ||||
| JP62200847A | ||||
| JP59122050A | ||||
| JP61125259A | ||||
| JP62100051A | ||||
| JP59223095A | ||||
| JP61251328A |
Attorney, Agent or Firm:
Osamu Hayasaki