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Title:
PULSE RATE VOLTAGE CONVERTING CIRCUIT
Document Type and Number:
Japanese Patent JPS6376612
Kind Code:
A
Abstract:

PURPOSE: To cause the low pass filter of a final stage to be sufficient with a simple constitution to remove a high frequency component by using a voltage generating circuit and a sample holding circuit and converting the pulse rate of an input pulse to a voltage.

CONSTITUTION: Since a voltage OE at a time F can be held by going back to the period of F from a time O, the holding of the voltage is dislocated for one period, and for the period of a pulse interval after a second pulse GHFI occurs, the voltage OE is held and then, a pulse rate can be converted to the voltage. Consequently, a voltage generating circuit 1 generates a voltage which comes to be v=c/t in accordance with the fall of an input pulse P, a voltage c/t is sampled for the 'H' level period of the input pulse P by a sample holding circuit 2, the voltage sampled for the 'L' level period is held, the output of the sample holding circuit 2 is inputted to a low pass filter 3 and conversion is realized.


Inventors:
ANDO TAKASHI
Application Number:
JP22263386A
Publication Date:
April 06, 1988
Filing Date:
September 19, 1986
Export Citation:
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Assignee:
SANYO ELECTRIC CO
International Classes:
H03K9/06; H03D3/00; (IPC1-7): H03D3/00; H03K9/06
Attorney, Agent or Firm:
Koji Yasutomi (1 person outside)



 
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