To enable transmission at a fast bit speed by giving an arbitrary order to symbol components of a vector signal and allowing the receiver to determine components of a transmit symbol after determining the best rearrangement of sent components, starting detect processing from the start level, and off-setting interference from lower levels when there are interferences for the respective levels.

The receiver 200 includes RF receiver sections and they interface with the antennas respectively. The receiver 200 further includes a preprocessor 60, a symbol processor 65, and a multiplexer 70. The processor 60 receives signals from the (n) antennas as signal vectors and preprocesses the received signal vectors to remove the interference between the signal components forming the vectors. This process includes a process for subtracting the interference due to a sent symbol detected before from a currently processed vector.