Title:
RATIO ANALOG-TO-DIGITAL CONVERTER CORRECTING NON-RATIO OFFSET
Document Type and Number:
Japanese Patent JPH0645942
Kind Code:
A
Abstract:
PURPOSE: To provide a ratio A/D converter by subtracting a non-ratio offset, stored in a storage device from a digital output, in order to eliminate an offset before calculation of a ratio of an A/D converter so as to cancel a non-ratio error of the A/D converter. CONSTITUTION: This ratio A/D converter 20 generates a digital output DOUT and gives it to a non-inverting input of a non-ratio error offset block 28. An offset stored in a storage device 30 is fed to an inverting input of a ratio offset block 28. The offsets are used to cancel an error from the digital output DOUT of the ratio A/D converter 20, and a value without an error is outputted with respect to the non-ratio offset. This value is given to a system calibration block 32 that conducts system calibration. Thus, the non-ratio offset is obtained at first and then stored in the storage device 30 and subtracted from the digital output DOUT of the A/D converter 20 before compensation of the system gain and the ratio offset.
Inventors:
DONARUDO ARAN KAASU
DAGURASU SUKOTSUTO PIASETSUKI
DAGURASU SUKOTSUTO PIASETSUKI
Application Number:
JP15583792A
Publication Date:
February 18, 1994
Filing Date:
May 22, 1992
Export Citation:
Assignee:
CRYSTAL SEMICONDUCTOR CORP
International Classes:
G01D3/00; H03M1/06; H03M1/10; H03M3/00; H03M3/02; H03M1/12; (IPC1-7): H03M3/02; H03M1/10
Domestic Patent References:
| JPS5941927A | 1984-03-08 | |||
| JPS59140720A | 1984-08-13 | |||
| JPS55153046A | 1980-11-28 | |||
| JPS637026A | 1988-01-12 | |||
| JPS5582540A | 1980-06-21 | |||
| JPS5315053A | 1978-02-10 |
Attorney, Agent or Firm:
Koichiro Kato (2 outside)
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