Title:
RDS DETECTION CIRCUIT
Document Type and Number:
Japanese Patent JP3354609
Kind Code:
B2
Abstract:
PURPOSE: To control a PLL circuit with a stable RDS lock detection section by making the detection of RDS stable.
CONSTITUTION: A latch circuit 6 latching an RDS lock detection section is provided between a PLL circuit 3 and an RDS lock detection section 4 in this configuration and the PLL circuit 3 is controlled by using an AND between a latched low level RDS lock detection signal and an initial synchronization identification signal. Even when the initial synchronization identification signal is fed from a clock recovery section 2 to an AND gate 7, since the RDS lock detection signal is at a low level, the initial synchronization identification signal is not fed to the PLL circuit 3 and the PLL circuit 3 is not frequently switched to the initial synchronization mode and the RDS lock detection signal is made stable.
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Inventors:
Yuji Yamamoto
Toshihito Ichikawa
Toshihito Ichikawa
Application Number:
JP33331292A
Publication Date:
December 09, 2002
Filing Date:
December 14, 1992
Export Citation:
Assignee:
Pioneer Corporation
International Classes:
H03D3/00; H03L7/08; H04L27/22; (IPC1-7): H04L27/22; H03D3/00; H03L7/08
Domestic Patent References:
| JP6387040A | ||||
| JP4280510A | ||||
| JP6444644A | ||||
| JP2104041A |
Attorney, Agent or Firm:
Yasuo Ishikawa (1 outside)
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