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Patent Searching and Data


Title:
REACTIVATING METHOD AT THE TIME OF BUS LOCK
Document Type and Number:
Japanese Patent JPH04155542
Kind Code:
A
Abstract:

PURPOSE: To reactivate a processor in a short time by defining the fact that a timer is not reset within a time preliminarily set by an access monitoring part as the generation of a bus lock, turning-on a reset line, and reactivating the processor.

CONSTITUTION: A timer 3 which turns-on a reset line 2 of a processor 1, and reactivates the processor 1 when the timer is not reset within the preliminarily set time, and an access monitoring part 5 which monitors the access state of a memory access line 4 of the processor 1, and resets the timer 3 at the time of detecting the access, are provided. Then, when the timer 3 is not reset within the time preliminarily set by the access monitoring part 5, it is defined as the generation of the bus lock, the reset line 2 is turned-on, and the processor 1 is reactivated. Thus, the processor is reactivated in the short time as hardly noticed from the outside, even at the time of the generation of the bus lock.


Inventors:
ONO KICHIJI
SUNAHARA HAJIME
Application Number:
JP28141790A
Publication Date:
May 28, 1992
Filing Date:
October 19, 1990
Export Citation:
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Assignee:
FUJITSU LTD
FUJITSU COMMUNICATION SYST
International Classes:
G06F11/30; G06F1/24; (IPC1-7): G06F1/24; G06F11/30
Attorney, Agent or Firm:
Sadaichi Igita