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Patent Searching and Data


Title:
RECEIVER
Document Type and Number:
Japanese Patent JP2008011142
Kind Code:
A
Abstract:

To solve the problem wherein a receiver adopting a conventional FEC (Forward Error Correction) method requires a mass receive buffer and high-speed transmission is difficult for the receiver since processing procedure is complicated, because in video image transmission by the conventional FEC method, a data block is created in which video image data are divided into a predetermined size, a parity code is added to a plurality of continuous data blocks, and the data blocks are transmitted after interleaving processing, consequently it is necessary for the receiver to store received data in a receive buffer and rearrange the received data in the buffer before error correction processing is performed and data are transferred to a reproducing means.

Processing of rearrangement becomes unnecessary for the receiver by adopting a method for interleaving image data and generating a parity. Moreover, a data extraction means transmits received data to a buffer memory and outputs the data to a parity operating means simultaneously, and the parity operating means can operate in real time with passing of the data. According to the arrangement, the receiver becomes inexpensive, and can perform high-speed processing.


Inventors:
YOSHIURA TSUKASA
ARII KOJI
Application Number:
JP2006179126A
Publication Date:
January 17, 2008
Filing Date:
June 29, 2006
Export Citation:
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Assignee:
MATSUSHITA ELECTRIC IND CO LTD
International Classes:
H04L1/00; H03M13/27
Attorney, Agent or Firm:
Fumio Iwahashi
Hiroki Naito
Daisuke Nagano