To provide a receiving circuit capable of accurately detecting a signal pattern of a data signal on a reception side.

The receiving circuit 12 receives a first data signal SDATA and a reference signal SFIX used to set a clamp voltage for clamping a detection signal for detecting the first data signal. The receiving circuit 12 includes an amplitude investigation circuit 13 which detects an H-level voltage and an L-level voltage of the reference signal SFIX, a clamp circuit 14 which clamps an H-level voltage and an L-level voltage of the detection signal to the clamp voltage, a control circuit 15 which sets the clamp voltage for the clamp circuit 14 based upon the H-level voltage and L-level voltage of the reference signal detected by the amplitude investigation circuit 13, and a data signal generation circuit which generates a second data signal based upon the detection signal clamped by the clamp circuit 14.