PURPOSE: To speed up the frequency synchronizing time of a local oscillator constituted of a phase locked loop(PLL).

CONSTITUTION: This receiving circuit includes the 1st local oscillator 12, the 1st frequency conversion circuit 11 for converting to the 1st intermediate frequency(IF) signal by using an output from the oscillator 12, the 2nd local oscillator 14 constituted of a PLL, and the 2nd frequency conversion circuit 13 for converting the 1st IF signal into the 2nd IF signal by using an output from the 2nd local oscillator 14. The circuit is also provided with a variable frequency type reference oscillator 15 for supplying a reference oscillation output to be a reference frequency to the 1st and 2nd local oscillators 12, 14 and an automatic frequency control circuit 16 for controlling the oscillation frequency of the oscillator 15 so as to suppress an error from the required value of the 2nd IF of the 2nd frequency conversion circuit 13 and the true value of the oscillation frequency of the oscillator 14 is provided with a deviation within an allowable range so that the common divisor frequency for the oscillation frequency of the oscillator 15 is increased.